19 April 2007

8051 mcu, von Neumann vs Harvard Architectures

We can classify computer architectures into two categories:

von Neumann architecture: computers has a single, common memory space in which both program instructions and data are stored. There is a single internal data bus that fetches both instructions and data. They can not be performed at the same time.

Harvard architecture: computers have separate memory areas for program instructions and data. There are two or more internal data buses, which allow simultaneous access to both instructions and data. The CPU fetches program instructions on the program memory bus.

The 8051 microcontrollers (MCS-51) have an 8-bit data bus. They can address 64K of external data memory and 64K of external program memory. These may be separate blocks of memory, so that up to 128K of memory can be attached to the microcontroller. Separate blocks of code and data memory are referred to as the Harvard architecture. A single block of memory may be mapped to act as both data and program memory. This is referred to as the Von Neumann architecture.

The 8051 has two separate read signals, RD# (P3.7) and PSEN#. The RD# (P3.7) is activated by clearing to logic level 0 when a byte is to be read from external data memory, PSEN#, from external program memory. All external code is fetched from external program memory. The bytes from external program memory may be read by special read instructions such as the MOVC. And there are separate instructions to read from external data memory, such as the MOVX instruction. In order to read from the same block using either the RD# signal or the PSEN# signal, the two signals are combined with a logic AND operation. This way, the output of the AND gate is low when either input is low.

By adopting the Von Neumann architecture, code may be written to memory as data bytes, and then executed as program instructions.

Further Reading

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